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发表于 16-3-2024 19:46:01|来自：湖北
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新加坡IC制造公司招聘：
Recruitment Position： Senior / System Engineer
System Engineer (Ethernet Switch)
JOB DESCRIPTION
Understand the specification and operation of hardware module in ethernet switch.
Create test plan for the hardware module and develop test program.
Perform verification of the functionality according to the specification, on both FPGA and silicon platform.
JOB REQUIREMENTS
Bachelor’s or Master’s Degree in Electrical Engineering
Familiar with Ethernet Switch layer 2 and layer 3 protocol
Good knowledge for router or switch SOC system design
Familiar with SOC architecture design, hardware/software partition.
Familiar with processor sub-system, such as ARM cortex-A/M/R.
Familiar with memory sub-system, such as SRAM/ DRAM/ Flash, etc.
Familiar with interface peripheral, such as Ethernet/ PCIe/ LIN/ CAN/ FlexRay/ SDHC/ I2S/ SPI/ I2C/ UART/ ADC
Familiar with C, Python, Verilog/ VHDL, systemC, System Verilog.
Familiar with hardware testing and debugging, such as oscilloscope, logic analyser, IXIA, etc.
Senior System Engineer (Ethernet Switch)
JOB DESCRIPTION
Understand the product requirement and create IP level architecture according to the requirement.
Define design specification for new hardware modules, together with IC design engineer.
Work with IC design engineers to resolve the issues during design phase and qualify the design.
Understand the design specification of existing hardware modules and make improvement.
JOB REQUIREMENTS
Bachelor’s or Master’s Degree in Electrical Engineering
Good knowledge for Camera serializer/deserializer application would be in advantage
Familiar with SOC architecture design, hardware/software partition.
Familiar with processor sub-system, such as ARM cortex-A/M/R would be in advantage.
Familiar with memory sub-system, such as SRAM/DRAM/Flash, etc. would be in advantage.
Familiar with interface peripheral, such as Ethernet/PCIe/LIN/CAN/FlexRay/SDHC/I2S/SPI/I2C/UART/ADC
Familiar with C, Python.
Familiar with hardware testing and debugging, such as oscilloscope, logic analyser etc.
Good knowledge in IC design and system design. Have led 2 or more SOC system design.
Have 3 years or more experience on switch SOC and/or multi-processor SOC system architecture design.
Experience in ASPICE, ISO26262, ISO21434 would be in advantage
Good communication skill and capable of collaboration with various teams.
These will be the requirements.
This position is urgent, and it is for a senior engineer. If the senior engineer performs well, he will be considered for leader position but not immediate.
There is no constraint in nationality but ability to converse in Chinese is a must as he is expected to communicate with engineer in Taiwan in Chinese.
From the description given, we should be looking at candidates with at least 5 years of relevant experience.
Notice period between 1 to 2 months is the standard norm. With December coming, you can expect candidate to wait till the new year before they consider switching job,
especially in Singapore and regional countries. Let’s analyze it case by case.
Working place: Singapore
Salary: Negotiable |
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